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  • Categories: Programmer & Sockets
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LCD LED screen EDID code chip data read line 2in1 Cable online Reading Writing line for RT80x809H CH341A TL866CS TL866A TL866II

Supports all 24C02 programmers to read and write

2015 the latest design base without the need to replace the plug can burn to write LCD LED code ( Note : do not support Chi Mei screen)

Now many brands of notebooks for the same type of screen after the black screen and so on, almost all of the code to replace

To this end, we specially designed to read and write a piece of code on the computer tool to facilitate the maintenance staff to improve work efficiency

The screen is almost all 24C02 so as long as you are a programmer to support 24C02, then on behalf of the screen can be used on your programmer

For T809H, you need to reset it:

CH001448
€8.58

LCD LED screen EDID code chip data read line 2in1 Cable online Reading Writing line for RT809F RT809H CH341A TL866CS TL866A TL866II

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Lattice USB download line FPGA CPLD ISP download simulation HWUSBN2A

Lattice USB download line FPGA CPLD ISP download simulation HW-USBN-2A

Login to Download: Download software

Features:

1. Using Lattice original design, to ensure the use of stable and reliable;

2. Support wide target voltage 1.2V- 5V;

3.USB power supply, no external power supply alone;

4. Supports all LATTICE development environments (LSC ISPVM, LATTICE DEMIOND, LATTICE ISPEVER, and LATTICE PROGRAMMER);

Supports a full range of Lattice FPGAs such as SC (M) / XP / XP2 / ECP2 (M) / ECP3 / ECP5 (G) / MachXO / MachXO2 / MachXO3 / ICE40 series;

6. Support Lattice full range of CPLDs, such as 1000/2000/4000 / ispMACH series;

7. Support JTAG, internal FLASH, SPI FLASH programming mode;

8. No need to install a separate driver, direct support for Diamond / ispLever6.x / 7.x / classic / ispVM various versions of drivers;

9. Has a current-limit input, ESD protection measures to ensure that the download line is complete;

10. Using Lattice official 2 * 5Pin pitch 2.54mm JTAG interface;

11. Support operating system Win2000 / XP, Windows7 / 8/10, Linux and so on

Download Wire Pin Description:

1.SCLK / TCK: connect with chip's SCLK / TCK pin;

2.GND: Downloader and the target board of the public, its internal 2,4-pin connection, in use, need to be a 2,4 feet connected to the target board;

3.MODE / TMS: with the chip's MODE / TMS pin connection;

4.GND: Downloader and the target board of the public, the internal 2,4-pin connection, in the need to use these two in a 2,4 feet connected to the target board;

5. SDI / TDI: SDI / TDI pin connection with the chip;

6.VCC: Used to detect whether the target board connected to the downloader is powered on or not used to power the target board. The official downloader does not have the ability to supply power to the target board. This needs attention;

7.SDO / TDO: SDO / TDO pin connection with the chip;

8.INTI: need to connect INTI pins when downloading and debugging some chips, not every chip needs to be connected;

9.TRST: In some chip download debugging need to connect TRST pin, not every chip needs to connect;

10.ispEN / Enable / PROG: It is necessary to connect the ispEN / Enable / PROG pins when downloading and debugging some chips, and not every chip needs to be connected.

Shipping list:

1.Lattice USB download cable (1)

2.USB 2.0 data cable (1)

3.10P 2.54MM spacing of the cable (1)

4.10P high-quality lattice special fly line (1)

5.2.54mm pitch 2X5 turn 8P standard definition line (1)

CH001589
€21.01

Lattice USB download line FPGA CPLD ISP download simulation HW-USBN-2A

LCD LED screen EDID code chip data read line 2in1 Cable online Reading Writing line for RT80x809H CH341A TL866CS TL866A TL866II

Supports all 24C02 programmers to read and write

2015 the latest design base without the need to replace the plug can burn to write LCD LED code ( Note : do not support Chi Mei screen)

Now many brands of notebooks for the same type of screen after the black screen and so on, almost all of the code to replace

To this end, we specially designed to read and write a piece of code on the computer tool to facilitate the maintenance staff to improve work efficiency

The screen is almost all 24C02 so as long as you are a programmer to support 24C02, then on behalf of the screen can be used on your programmer

For T809H, you need to reset it:

CH001448
€8.58

LCD LED screen EDID code chip data read line 2in1 Cable online Reading Writing line for RT809F RT809H CH341A TL866CS TL866A TL866II

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AK90 Key Programmer Adapter and 10Pin Cable Set

New For AK90+ Key Programmer Adapter and 10Pin Cable Set

Works together with For AK90+ key programmer.

Package List:

1pc x For AK90+ 10 Pin Cable

1pc x For AK90+ Chip data to read specific seat

CH001495
€22.25

AK90+ Key Programmer Adapter and 10Pin Cable Set

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Lattice USB download line FPGA CPLD ISP download simulation HWUSBN2A

Lattice USB download line FPGA CPLD ISP download simulation HW-USBN-2A

Login to Download: Download software

Features:

1. Using Lattice original design, to ensure the use of stable and reliable;

2. Support wide target voltage 1.2V- 5V;

3.USB power supply, no external power supply alone;

4. Supports all LATTICE development environments (LSC ISPVM, LATTICE DEMIOND, LATTICE ISPEVER, and LATTICE PROGRAMMER);

Supports a full range of Lattice FPGAs such as SC (M) / XP / XP2 / ECP2 (M) / ECP3 / ECP5 (G) / MachXO / MachXO2 / MachXO3 / ICE40 series;

6. Support Lattice full range of CPLDs, such as 1000/2000/4000 / ispMACH series;

7. Support JTAG, internal FLASH, SPI FLASH programming mode;

8. No need to install a separate driver, direct support for Diamond / ispLever6.x / 7.x / classic / ispVM various versions of drivers;

9. Has a current-limit input, ESD protection measures to ensure that the download line is complete;

10. Using Lattice official 2 * 5Pin pitch 2.54mm JTAG interface;

11. Support operating system Win2000 / XP, Windows7 / 8/10, Linux and so on

Download Wire Pin Description:

1.SCLK / TCK: connect with chip's SCLK / TCK pin;

2.GND: Downloader and the target board of the public, its internal 2,4-pin connection, in use, need to be a 2,4 feet connected to the target board;

3.MODE / TMS: with the chip's MODE / TMS pin connection;

4.GND: Downloader and the target board of the public, the internal 2,4-pin connection, in the need to use these two in a 2,4 feet connected to the target board;

5. SDI / TDI: SDI / TDI pin connection with the chip;

6.VCC: Used to detect whether the target board connected to the downloader is powered on or not used to power the target board. The official downloader does not have the ability to supply power to the target board. This needs attention;

7.SDO / TDO: SDO / TDO pin connection with the chip;

8.INTI: need to connect INTI pins when downloading and debugging some chips, not every chip needs to be connected;

9.TRST: In some chip download debugging need to connect TRST pin, not every chip needs to connect;

10.ispEN / Enable / PROG: It is necessary to connect the ispEN / Enable / PROG pins when downloading and debugging some chips, and not every chip needs to be connected.

Shipping list:

1.Lattice USB download cable (1)

2.USB 2.0 data cable (1)

3.10P 2.54MM spacing of the cable (1)

4.10P high-quality lattice special fly line (1)

5.2.54mm pitch 2X5 turn 8P standard definition line (1)

CH001589
€21.01

Lattice USB download line FPGA CPLD ISP download simulation HW-USBN-2A

wishlist
Compare
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