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Realtek RTL8103EL

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000573
€3.45

Realtek RTL8103EL

Maxim MAX1645B

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000574
€3.45

Maxim MAX1645B

IC Chip Extractor Rework Station Hot Motherboard Circuit Board Component Puller Tweezer Tool for Welding Solder Soldering Iron

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH001543
€2.70

IC Chip Extractor Rework Station Hot Motherboard Circuit Board Component Puller Tweezer Tool for Welding Solder Soldering Iron

FAIRCHILD FDS6679

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000581
€3.45

FAIRCHILD FDS6679

H26M42003GMRA

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000586
€8.74

H26M42003GMRA

NUVOTON NPCE783LA0DX

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000587
€3.45

NUVOTON NPCE783LA0DX

Lattice USB download line FPGA CPLD ISP download simulation HWUSBN2A

Lattice USB download line FPGA CPLD ISP download simulation HW-USBN-2A

Login to Download: Download software

Features:

1. Using Lattice original design, to ensure the use of stable and reliable;

2. Support wide target voltage 1.2V- 5V;

3.USB power supply, no external power supply alone;

4. Supports all LATTICE development environments (LSC ISPVM, LATTICE DEMIOND, LATTICE ISPEVER, and LATTICE PROGRAMMER);

Supports a full range of Lattice FPGAs such as SC (M) / XP / XP2 / ECP2 (M) / ECP3 / ECP5 (G) / MachXO / MachXO2 / MachXO3 / ICE40 series;

6. Support Lattice full range of CPLDs, such as 1000/2000/4000 / ispMACH series;

7. Support JTAG, internal FLASH, SPI FLASH programming mode;

8. No need to install a separate driver, direct support for Diamond / ispLever6.x / 7.x / classic / ispVM various versions of drivers;

9. Has a current-limit input, ESD protection measures to ensure that the download line is complete;

10. Using Lattice official 2 * 5Pin pitch 2.54mm JTAG interface;

11. Support operating system Win2000 / XP, Windows7 / 8/10, Linux and so on

Download Wire Pin Description:

1.SCLK / TCK: connect with chip's SCLK / TCK pin;

2.GND: Downloader and the target board of the public, its internal 2,4-pin connection, in use, need to be a 2,4 feet connected to the target board;

3.MODE / TMS: with the chip's MODE / TMS pin connection;

4.GND: Downloader and the target board of the public, the internal 2,4-pin connection, in the need to use these two in a 2,4 feet connected to the target board;

5. SDI / TDI: SDI / TDI pin connection with the chip;

6.VCC: Used to detect whether the target board connected to the downloader is powered on or not used to power the target board. The official downloader does not have the ability to supply power to the target board. This needs attention;

7.SDO / TDO: SDO / TDO pin connection with the chip;

8.INTI: need to connect INTI pins when downloading and debugging some chips, not every chip needs to be connected;

9.TRST: In some chip download debugging need to connect TRST pin, not every chip needs to connect;

10.ispEN / Enable / PROG: It is necessary to connect the ispEN / Enable / PROG pins when downloading and debugging some chips, and not every chip needs to be connected.

Shipping list:

1.Lattice USB download cable (1)

2.USB 2.0 data cable (1)

3.10P 2.54MM spacing of the cable (1)

4.10P high-quality lattice special fly line (1)

5.2.54mm pitch 2X5 turn 8P standard definition line (1)

CH001589
€21.01

Lattice USB download line FPGA CPLD ISP download simulation HW-USBN-2A

TI TPS51116RG

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000590
€3.45

TI TPS51116RG

Realtek RTL8103EL

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000573
€3.45

Realtek RTL8103EL

Maxim MAX1645B

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000574
€3.45

Maxim MAX1645B

IC Chip Extractor Rework Station Hot Motherboard Circuit Board Component Puller Tweezer Tool for Welding Solder Soldering Iron

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH001543
€2.70

IC Chip Extractor Rework Station Hot Motherboard Circuit Board Component Puller Tweezer Tool for Welding Solder Soldering Iron

FAIRCHILD FDS6679

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000581
€3.45

FAIRCHILD FDS6679

H26M42003GMRA

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000586
€8.74

H26M42003GMRA

NUVOTON NPCE783LA0DX

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000587
€3.45

NUVOTON NPCE783LA0DX

Lattice USB download line FPGA CPLD ISP download simulation HWUSBN2A

Lattice USB download line FPGA CPLD ISP download simulation HW-USBN-2A

Login to Download: Download software

Features:

1. Using Lattice original design, to ensure the use of stable and reliable;

2. Support wide target voltage 1.2V- 5V;

3.USB power supply, no external power supply alone;

4. Supports all LATTICE development environments (LSC ISPVM, LATTICE DEMIOND, LATTICE ISPEVER, and LATTICE PROGRAMMER);

Supports a full range of Lattice FPGAs such as SC (M) / XP / XP2 / ECP2 (M) / ECP3 / ECP5 (G) / MachXO / MachXO2 / MachXO3 / ICE40 series;

6. Support Lattice full range of CPLDs, such as 1000/2000/4000 / ispMACH series;

7. Support JTAG, internal FLASH, SPI FLASH programming mode;

8. No need to install a separate driver, direct support for Diamond / ispLever6.x / 7.x / classic / ispVM various versions of drivers;

9. Has a current-limit input, ESD protection measures to ensure that the download line is complete;

10. Using Lattice official 2 * 5Pin pitch 2.54mm JTAG interface;

11. Support operating system Win2000 / XP, Windows7 / 8/10, Linux and so on

Download Wire Pin Description:

1.SCLK / TCK: connect with chip's SCLK / TCK pin;

2.GND: Downloader and the target board of the public, its internal 2,4-pin connection, in use, need to be a 2,4 feet connected to the target board;

3.MODE / TMS: with the chip's MODE / TMS pin connection;

4.GND: Downloader and the target board of the public, the internal 2,4-pin connection, in the need to use these two in a 2,4 feet connected to the target board;

5. SDI / TDI: SDI / TDI pin connection with the chip;

6.VCC: Used to detect whether the target board connected to the downloader is powered on or not used to power the target board. The official downloader does not have the ability to supply power to the target board. This needs attention;

7.SDO / TDO: SDO / TDO pin connection with the chip;

8.INTI: need to connect INTI pins when downloading and debugging some chips, not every chip needs to be connected;

9.TRST: In some chip download debugging need to connect TRST pin, not every chip needs to connect;

10.ispEN / Enable / PROG: It is necessary to connect the ispEN / Enable / PROG pins when downloading and debugging some chips, and not every chip needs to be connected.

Shipping list:

1.Lattice USB download cable (1)

2.USB 2.0 data cable (1)

3.10P 2.54MM spacing of the cable (1)

4.10P high-quality lattice special fly line (1)

5.2.54mm pitch 2X5 turn 8P standard definition line (1)

CH001589
€21.01

Lattice USB download line FPGA CPLD ISP download simulation HW-USBN-2A

TI TPS51116RG

Technical Support

BGA CHIPSET OBSERVE PRECAUTIONS FOR HANDLING

BGA Chips is MOISTURE SENSITIVE DEVICES. Devices require baking, before mounting, Here is the general bake-out process, Lay the BAG on the tray, and put it in to a baking dry cabinet. Set the temperature and time as: 125C x 24 hours or 80C x 48 hours

Pay attention to the difference between

leaded (Pb) balls and lead free (No Pb) balls.

Lead-free/No Pb BGA chips:

245C-260C(Maximun)

Leaded/Pb BGA chips:

180C-205C(Maximun)

Sufficient Stock

CH000590
€3.45

TI TPS51116RG